ISL89367
Pin Configurations
ISL89367
Pin Descriptions
PIN
(16 LD TDFN, EPSOIC)
TOP VIEW
NUMBER
1, 8
SYMBOL
VREF+
VREF-
DESCRIPTION
VREF+ and VREF- are the reference voltages for
the IN1A, IN1B, IN2A, and IN2B logic inputs.
VREF+
INVA
IN1A
1
2
3
16
15
14
FDELA
RDELA
VDD
2, 7
INVA or
VREF+ is normally connected to the positive bias
voltage of the input logic. VREF- is normally
connected to the ground reference of the input
logic.
Connect these pins to VDD to invert the
IN2A
4
13
OUTA
INVB
corresponding output. Connect to VSS to not
IN1B
IN2B
5
6
12
11
OUTB
VSS
3, 4,
5, 6
IN1A,
IN2A,
invert the corresponding output.
ANDed logical inputs. One input to each channel
can be used as an enable. Logic high threshold is
IN1B,
63% of [(VREF+) - (VREF-)]. Logic low threshold is
INVB
7
10
RDELB
IN2B
37% of [(VREF+) - (VREF-)].
VREF-
8
EPAD
9
FDELB
9, 16
FDELB,
FDELA
Connect a resistor between these pins and VSS to
program the duration of the falling edge
propagation delay of the corresponding output
relative to the logic inputs.
INVx
0
0
TRUTH TABLE
IN1x IN2x
0
0
0
1
OUTx
0
0
10, 15
RDELB,
RDELA
Connect a resistor between these pins and VSS to
program the duration of the rising edge
propagation delay of the corresponding output
relative to the logic inputs.
INVx
IN1x
OUTx
0
0
1
1
0
1
0
1
11, 14
VSS, VDD Output bias voltage. (VDD to VSS) range is 4.5V to
16V. VSS may be negative relative to VREF-.
IN2x
1
1
1
0
0
1
0
1
0
1
1
1
12, 13
OUTB,
OUTA
EPAD
6A peak outputs. Output voltage swing is
between VDD and VSS.
Must be connected to logic ground (VREF-).
1
1
1
0
Ordering Information
PART NUMBER
TEMP RANGE
PACKAGE
PKG.
(Notes 1, 2, 3)
ISL89367FRTAZ
PART MARKING
9367A
(°C)
-40 to +125
INPUT CONFIGURATION
Non-inverting
(Pb-Free)
16 Ld 3x5 TDFN
DWG. #
L16.5x3
NOTES:
1. Add “-T”, suffix for tape and reel. Please refer to TB347 for details on reel specifications.
2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte
tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil
Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
3. For Moisture Sensitivity Level (MSL), please see device information page for ISL89367. For more information on MSL, please see Technical Brief
TB363 .
3
FN7727.1
October 8, 2012
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